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Yet another EBAZ4205 writeup
#4: PYNQ overlay example

This post will show how to use hardware overlays on our recently uploaded PYNQ system. We will add AXI interface software control for the onboard LEDs and push-button, as well a custom Verilog hardware module. This is a convenient way to interface hardware modules designed in hardware description languages (i.e. Verilog/VHDL) via an easy to use Python interface. References : [1] Creating and using hardware designs. Good intros to PYNQ overlays. [2] More details , including high performance interface and hierarchical hardware blocks. [3] Adding ready-made IPs  to PYNQ overlay. Pre-requisites : Working Vivado installation. Vivado and version PYNQ versions should match and we installed PYNQ 2.5.x, so we use Vivado 2019.1. EBAZ4205 board with a booting PYNQ image. 1. Zynq PS GPIOs: the Zynq processor has 64 GPIO lines that can be used to control low-speed non timing-critical hardware functions, either by connecting them to PL modules or to physical IO pins. The onboard buttons  ...
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Yet another EBAZ4205 writeup
#3: PYNQ!

In this post we will leverage our basic Petalinux build to install PYNQ on our EBAZ4205 evaluation board. PYNQ is a framework being developed by Xilinx to interface all of a Zynq boards' capabilities (i.e. custom logic, processing, and peripherals) via a Python environment. It is enabled thanks to the Zynq's unique feature compared to other FPGAs, in which the logic fabric (PL) is actually programmed by the processor (PS) on boot. As a result, running PYNQ enables to use custom logic without the need of an external JTAG programmer . References : [1]  PYNQ for Cora-Z7-07S  and  GitHub PYNQ-Cora-Z7-07S . Great walkthrough. I modified it to apply to EBAZ4205 board. [2] Quick Porting of PYNQ . A general purpose introduction to PYNQ porting. Some useful replies. [3]  Load a PYNQ 2.5 bitstream during power-up . The last nail in the coffin: how to make ethernet work. Pre-requisites : Software tools install...

Yet another EBAZ4205 writeup
#2: Petalinux 2019.1 Walkthrough

In order to leverage the capabilities of the EBAZ4205 I want it to run Linux. There are a couple of guides online which didn't work for me, because I have the board variant without a Y3 crystal at the ethernet IC. I'm also not an experienced FPGA developer, so some of the implicit steps were non-trivial for me at all. This was an excellent opportunity to pick up the glove and learn how to build Petalinux myself. So lets get to work! This guide uses 2019.1 toolchain, for two main reasons: It is the last version before Xilinx's migration to Vitis so there is more data online from other users. While the hardware flow is identical to the Vivado 2020.X editions, the Petalinux u-boot build process is different (see  Tux Engineering, Inc. - Home ), and has resulted errors for me, which I currently don't know how to solve. Refences The full writeup puts together bits and pieces are from the following sources: [1]  zynq[1] 矿板helloworld | hhuysqt  (using Google-Translate) [2] ...